SEATTLE, WA--(Marketwire - September 26, 2007) - Leading logic nonvolatile memory (NVM)intellectual property (IP) supplier, Impinj, Inc., today announced that thecompany's multiple-time programmable AEON®/MTP memory designed with 2.5Vfloating-gate transistors has been silicon-verified in Taiwan SemiconductorManufacturing Co.'s (TSMC's) 65 nm LP process. A semiconductor technologybreakthrough that leverages Impinj's extensive semiconductor designexpertise and TSMC's advanced manufacturing capability, AEON/MTP is thefirst available NVM IP based on floating gate technology with 2.5Vtransistors. Impinj is also developing AEON/MTP NVM cores in TSMC's 45 nmprocesses to address escalating demand from leading-edge system-on-chip(SoC) designers for logic NVM in industry-leading process geometries.
Embedded in more than 600 million chips from leading semiconductorcompanies, AEON/MTP cores allow many more IC designs to leverage thebenefits of multiple-time programmable (MTP) NVM in standard logic CMOSprocesses. Multiple-time programmable NVM provides significant SoC designflexibility and testability advantages over one-time programmable NVM,including security key refresh capability, in-field user data configurationand in-field performance optimization.
The 65 nm AEON/MTP product meets the following performance specifications:
- Availability in 32 bit to 8k bit configurations for maximum design flexibility
- 15k write-cycle endurance for frequent in-field updating or reprogramming
- 10-year data retention for long product life
- -40 to +125°C operating temperature for high demand industrial applications
"The availability of AEON/MTP in 65 nm processes dispels a long-heldindustry misconception that floating gates manufactured in 2.5V processesdo not retain charge," said Larry Morrell, vice president and generalmanager of IP Products at Impinj. "AEON/MTP NVM with 2.5V floating gatetransistors has been put through rigorous testing and its reliability andperformance have been proven."
Impinj's AEON/MTP cores in TSMC's 65 nm process are available in Novemberto qualified customers with broad availability in the first quarter of2008. Development of AEON/MTP cores in TSMC's 45 nm process is underwaywith planned availability in late 2008.
To request datasheets and additional information about Impinj's AEON logicnonvolatile memory, please visit ip-support.impinj.com.
About Impinj, Inc.
Impinj, Inc. is a semiconductor and RFID company whose patentedSelf-Adaptive Silicon® technology enables two synergistic business lines:high-performance RFID solutions and semiconductor intellectual property(IP). Impinj is the leading technical innovator in developing UHF RFIDsolutions for both item-level and supply-chain tagging worldwide. Impinjdraws on its technical expertise and industry partnerships to deliver theGrandPrix™ RFID solution comprising high-performance tags, readers,software, antennas, and systems integration. Impinj also licensesinnovative IP products to leading semiconductor companies worldwide,allowing them to seamlessly integrate crucial nonvolatile memory (NVM)alongside analog and digital functionality on a single chip. Impinj's IPproducts include the popular AEON® family of embeddable cores, whichprovide rewriteable NVM technology in logic CMOS manufacturing. For moreinformation, visit www.impinj.com.
Impinj, Speedway, Self-Adaptive Silicon, GrandPrix and AEON are eitherregistered trademarks or trademarks of Impinj, Inc.